Honda Motor and Renesas Electronics Corporation have entered into an agreement to co-develop a high-performance system-on-chip (SoC) tailored for software-defined vehicles (SDVs). This breakthrough collaboration was announced on January 7, 2025, during a Honda press conference at CES in Las Vegas, Nevada.
The innovative SoC, featuring cutting-edge AI performance of 2,000 TOPS (Tera Operations Per Second) and world-class power efficiency of 20 TOPS/W, will be incorporated into Honda’s upcoming “Honda 0 (Zero) Series” of electric vehicles (EVs), set to debut in the late 2020s.
Honda’s vision for the Honda 0 Series revolves around SDVs that provide personalized mobility experiences. These vehicles will utilize a centralized E/E (electrical and electronic) architecture, consolidating multiple ECUs into a singular core ECU. This ECU will oversee critical functions such as Advanced Driver Assistance Systems (ADAS), Automated Driving (AD), powertrain management, and comfort features.
To power this centralized system, the new SoC—developed in partnership with Renesas—offers exceptional processing capabilities while maintaining minimal power consumption. Renesas’ R-Car Gen 5 series, combined with an AI accelerator optimized by Honda, leverages multi-die chiplet technology to enable modular design, future scalability, and high efficiency.
Manufactured using TSMC’s cutting-edge 3-nm automotive process technology, the SoC boasts industry-leading AI performance and power efficiency. This makes it a cornerstone for achieving advanced features in SDVs, such as automated driving, without compromising energy efficiency.
This collaboration underscores a long-standing relationship between Honda and Renesas, marking a significant leap in integrating advanced semiconductor technologies into the automotive industry. The SoC solution is poised to redefine mobility by enhancing the performance and personalization of next-generation EVs.
